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\title{Securing Distributed FPGA System using Commutative RSA Core}
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             \author[1]{R.  Ambika}

             \author[2]{S.  Ramachandran}

             \author[3]{K. R.  Kashwan}

             \affil[1]{  BMS Institute of Technology}

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\date{\small \em Received: 12 December 2012 Accepted: 4 January 2013 Published: 15 January 2013}

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\begin{abstract}
        


Protecting important data is of utmost concern to the organizations or multiple transceiver based communication systems and, cryptography is one of the primary ways to do the job. RSA algorithm is extensively used in the popular implementations of Public Key Infrastructures. Many cryptographic protocols and attacks on these protocols make use of the fact that the order in which encryption is performed does not affect the result of the encryption, i.e., encryption is commutative. On the other hand, the need of a security feature encompassing data authentication among multiple MIMO or transceivers has become very critical. This paper presents the implementation of a cryptography core based on Commutative RSA public key cryptography algorithm for accomplishing data security and authentication in environment comprising multiple FPGA cores without any key exchange overheads. In spite of considering conventional two terminal communications, we have implemented a scalable architecture for multi distributed FPGA based systems and realizes commutative RSA algorithm for verifying data security among multiple transceiver terminals. In this approach, a sophisticated RSA cryptographic technique based on commutative Encryption methodology has been implemented for distributed FPGA terminals. The proposed system architecture has used the Montgomery multiplication algorithm with exponential modular multiplication and Radix-2 multiplication based multiparty cryptography.

\end{abstract}


\keywords{authentication, cryptography, data security, FPGA, montgomery multiplication, RSA cryptosystem, Radix-2 multiplier.}

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\let\tabcellsep& 	 	 		 
\section[{Introduction}]{Introduction}\par
s the telecommunication network has grown explosively and the internet has become increasingly popular, security over the network is the main concern for services like electronic commerce \hyperref[b0]{[1]}. The fundamental security requirements include confidentiality, authentication, data integrity, and non repudiation. Cryptography plays an important role in the security of data. It enables us to store sensitive information or transmit it across insecure networks so that unauthorized persons cannot read it. The urgency for secure exchange of digital data resulted in large quantities of different encryption algorithms which can be classified into two groups: symmetric key algorithms (with private key algorithms) and asymmetric key algorithms (with public key algorithms) \hyperref[b1]{[2]}. Many systems utilize public-key cryptography to provide such security services, and the algorithms developed by Rivest, Shamir, and Adleman (RSA) \hyperref[b2]{[3]} is one of the most widely adopted public key algorithms at present. Since, RSA is considered as an efficient and optimized solution for public-key cryptography, we have implemented the Commutative RSA (CRSA) approach for authenticating data communication between Multiple Input Multiple Output (MIMO) or transceiver systems. In most of the existing data authentication or security systems, the authentication is accomplished by key exchange approach and thus it increases the key exchange overheads. On the other hand at every terminal, encryption and decryption process is required and thus if general RSA approach is applied in that case the data authentication and security could be violated. Therefore, in order to accomplish the goal of data security with individual encryption/decryption without affecting the data security and its integrity, a modified RSA has been developed and this mechanism is termed as Commutative RSA (CRSA).\par
RSA is the most widely used public-key cryptosystem. An RSA operation is an exponentiation, which requires repeated multiplications. The Montgomery multiplication algorithm \hyperref[b3]{[4]} is the most efficient multiplication algorithm available. It replaces trial division by the modulus with a series of additions and divisions by a power of two. Thus, it is well suited to hardware implementation and forms the basis of many of the currently reported RSA hardware architectures \hyperref[b4]{[5]}\hyperref[b5]{[6]}\hyperref[b6]{[7]}. To date, several techniques have been proposed in order to avoid carry propagation during the addition stages of the computation, as this is a key factor in determining performance. One approach proposed by Elbirt and Paar \hyperref[b5]{[6]} is to break these additions into x-bit stages, where x is an optimal bit length chosen to take advantage of the fast carry chains available on modern FPGAs. However, a drawback of this approach is that the circuits developed can be very heavily technology A XIII Issue XV Version I 47 ( ) and implementation dependent. For example, it is unlikely that a design created in this manner for a specific FPGA family will show the same speed advantages if migrated to a modern ASIC technology or, indeed, an alternative type of FPGA or Programmable Logic Device (PLD). An alternative approach presented by Blum and Paar \hyperref[b6]{[7]} is based on the use of FPGA systolic array multiplier architectures with varying processing element sizes, namely, 4, 8 and 16 bits. However, these systems are again tailored specifically for the XilinxFPGA series.\par
As the operands such as the plain text of a message or the cipher or possibly a partially ciphered text are usually large and, in order to improve time requirements of the encryption/decryption operations, it is essential to attempt to minimize the number of multiplications performed and to reduce the time requirement of a single multiplication. There are various algorithms that implement multiplication. But considering the versatility and robustness of Montgomery multiplication approach, we have used Montgomery Multiplication algorithm. The most attractive feature of Montgomery algorithm is that it computes multiplications without trial divisions.\par
The RSA algorithm and Diffie-Hellman key exchange scheme need exponentiation, which binary or m-ary methods can break into a series of multiplications. It is effectively accomplished by Montgomery multiplication algorithm. Montgomery algorithm speeds up the multiplications and squaring required for exponentiation. The efficient implementation of this long-word length multiplication is crucial for the performance of public-key cryptography like our proposed CRSA. Exponentiation with a large modulus, which is usually accomplished by repeated multiplications, has been widely used in public key cryptosystems for secured data communications. To speed up the computation, the Montgomery multiplication algorithm is used to relax the process of quotient determination and, the carrysave addition (CSA) is employed to reduce the critical path delay. Basically, the exponentiation with a large modulus is usually accomplished by performing repeated multiplications, which is considerably timeconsuming. As a result, the throughput rate of RSA cryptosystem will be entirely dependent on the speed of multiplication and the number of performed multiplications. One way to achieve this is to use carry save adders (CSAs) to perform the addition stages of Montgomery's algorithm. For example, Kim et al. \hyperref[b7]{[8]} used two levels of carry save logic (CSL) and a 32-bit carry propagate adder along with a 32 x 32-bit shift register in order to perform the 1024-bit additions required. Bunimov et al. \hyperref[b8]{[9]} improved this by replacing one level of CSL with a look-up table.\par
In order to accomplish the goal of data security and authentication among multiple MIMO or transceiver terminals with proposed Commutative RSA cryptographic algorithm, we have implemented an enhanced and optimized noble data authentication architecture called Commutative RSA algorithm with multiple MIMO or transceiver systems, and simulated on FPGA devices. In this approach, three FPGA cores have been considered in simulation framework and simulation for RSA encryption and decryption has been accomplished at every considered terminal. The developed architecture encompasses the Montgomery modular multiplication approach to speed up the computation and to relax the process of quotient determination and similarly the carry-save addition has been employed to reduce the critical path delay. The proposed multiplier is able to work with any precision of the input operands, limited only by memory or control constraints. In order to make the system compatible with Very Large Scale Integration and to get optimized performance, the system architecture has been developed with Montgomery multiplication with Radix-2 multiplier based architecture. We have implemented two different CRSA implementation architectures. One is Serial Montgomery implementation and another one represents Parallel Montgomery based CRSA core. The performance for both architectures for delay, frequency, efficiency, power consumption as well as throughput have been calculated and we have found that the proposed Parallel Montgomery (PM) based CRSA performs far better than serial Montgomery (SM) based CRSA core.\par
The remaining paper has been divided into the following sections. Section 2 discusses in brief the literature survey conducted for the research work with emphasis on RSA algorithm and implementation of Montgomery multiplication with Radix-2 architecture. Section 3 discusses the proposed Commutative RSA algorithm and presents the mathematical derivation for CRSA approach. Section 4 represents the proposed commutative RSA core based on serial Montgomery and parallel Montgomery multipliers. The hardware implementation has been presented in Section 5 followed by Section 6 that presents the results and analysis of the research work. The conclusion has been given in the last section. 
\section[{II.}]{II.} 
\section[{Related Works}]{Related Works}\par
Gustavo D. Sutter et. al \hyperref[b9]{[10]} optimized the Montgomery's multiplication and proposed architectures to perform the least significant bit first and the most significant bit first algorithms. The developed architecture has the following distinctive characteristics: 1) use of digit serial approach for Montgomery multiplication. 2) Conversion of the CSA representation of intermediate multiplication using carry-skip addition. This allows the critical path to be reduced, albeit with a small-area speed penalty; and 3) recomputed the quotient value in Montgomery's iteration in order to XIII Issue XV Version I 
\section[{( )}]{( )}\par
Year researchers presented results in Xilinx Vertex 5 and in 0.18-?m application-specified integrated circuit technologies.\par
Jin-Hua and Cheng-Wen \hyperref[b10]{[11]} proposed a radix-4 modular multiplication algorithm based on Montgomery's algorithm, and a fast radix-4 modular exponentiation algorithm for RSA public-key cryptosystem. The proposed multiplier is four-times faster than a direct radix-2 implementation of Montgomery's algorithm. Extending the design for a larger modulus is straightforward. High-radix bit-level and digit-level modular multipliers have also been discussed.\par
C. McIvor et.al \hyperref[b11]{[12]} presented Modified Montgomery multiplication and associated RSA modular exponentiation algorithms and circuit architectures. Practical approach presented is based on a reformulation of the solution to modular multiplication within the context of RSA exponentiation.\par
Alexandre F. Tenca and C¸ etin K. Koc \hyperref[b12]{[13]} presented a scalable architecture for the computation of modular multiplication based on the Montgomery multiplication algorithm. A word-based version of is presented and used to explain the main concepts in the hardware design. The proposed multiplier is able to work with any precision of the input operands, limited only by memory or control constraints.\par
Marcelo E. and Naofumi Takagi \hyperref[b13]{[14]} proposed a mixed radix-4/2 algorithm for modular multiplication/division for a large modulus suitable for VLSI implementation. The calculation of modular multiplication is based on the Montgomery multiplication algorithm and the modular division on the extended Binary GCD algorithm. The researchers exploit these similarities to modify the algorithms in order to share almost all hardware components for both operations. Koç, C.K., et.al \hyperref[b14]{[15]} studied the operations involved in computing the Montgomery product and describe several high-speed, space-efficient algorithms for computing MonPro (a, b), and analyzed their time and space requirements. Their focus is to collect several alternatives for Montgomery multiplication, three of which are new. However, the researchers do not compare the Montgomery techniques to other modular multiplication approaches.\par
Ching-Chao Yang et. al \hyperref[b15]{[16]} proposed a new algorithm based on Montgomery's algorithm to calculate modular multiplication that is the core arithmetic operation in an RSA cryptosystem. The modified algorithm eliminates over-large residue and has very short critical path delay that yields a very high-speed processing. The researchers have implemented a 512bit single-chip RSA processor based on the modified algorithm with Compass 0.6-µm SPDM CMOS cell library.\par
GuilhermePerin et. al \hyperref[b17]{[18]} described a comparison of two Montgomery modular multiplication architectures: a systolic and a multiplexed. Both implementations target FPGA devices. The modular multiplication is employed in modular exponentiation processes, which are the most important operations of some public-key cryptographic algorithms, including the most popular of them, the RSA. The proposed systolic architecture presents a high-radix implementation with a one-dimensional array of Processing Elements.\par
The RSA algorithm proposed by P. Fournaris and O. Koufopavlou \hyperref[b18]{[19]} has gained wide acceptability and has been well used algorithm in many security applications. Its main mathematical function is demanding in terms of speed, operation of modular exponentiation. In this article, a systolic, scalable, redundant carry-save modular multiplier and RSA encryption architecture are proposed using the Montgomery modular multiplication algorithm.\par
Perovic, N. S. et. al \hyperref[b22]{[23]} presented FPGA implementation of RSA algorithm, where a key is 1024 bits long and the project synthesis results like resource occupancy, maximal operating frequency, etc. were examined for the system implementation. 
\section[{III.}]{III.} 
\section[{Proposed System}]{Proposed System}\par
Highly robust and optimized system architecture for implementation of ?????????????????????? ?????? algorithm for data authentication among multiple MIMO terminals (here simulated on FPGA devices) has been proposed in this paper. In order to facilitate the secure data communication among multiple MIMO or transceiver systems, a noble commutative RSA approach that states that, the order in which encryption is performed does not affect the result of the encryption, has been implemented and simulated on multiple FPGA devices. In order to optimize the performance of the system with minimum space and higher speed, the robust Montgomery modular multiplication mechanism has been adopted with ?????????? ? 2 multiplication architecture. We have proposed the implementation of Serial Montgomery as well as Parallel Montgomery based CRSA cryptography core, with a goal to enhance the system performance for its less memory occupancy, fast rate, higher throughput and less power consumption. 
\section[{XIII Issue XV Version I}]{XIII Issue XV Version I} 
\section[{( )}]{( )} 
\section[{Year}]{Year}\par
Along with the strong momentum of shifting from single-core to multicore systems, Zhimin Chen et.\par
al \hyperref[b16]{[17]} present a parallel-software implementation of the Montgomery multiplication for multicore systems. Their comprehensive analysis shows that the proposed scheme, pSHS, partitions the task in a balanced way so that each core has the same amount of job to do. In addition, we also comprehensively analyze the impact of inter-core communication overhead on the performance of pSHS. The analysis reveals that pSHS is high performance, scalable over different number of cores, and stable when the communication latency changes. 
\section[{a) Commutative RSA}]{a) Commutative RSA}\par
A secure plane is realizable provided the data communicated over the plane is protected and cannot be colluded. The use of cryptographic techniques is generally preferred, hence the ???????????? ?????????? ???????? ?????????????????????????? ???????????????? ( ??????????) proposed in this paper adopts the commutative RSA algorithm. The ?????????? considers two prime numbers ??????????\textunderscore ?? ?? ???????? and ??????????\textunderscore ?? ?? ???????? initialized amongst all the group members. ?? ?? Let and ?? ?? represent the group members required to communicate over the secure plane. To compute the encryption keys and decryption key pairs of the commutative RSA algorithm, the Property ????????\textunderscore ?? ???????? and ????????\textunderscore ?? ???????? are computed using the following equations:????????\textunderscore ?? ???????? = ??????????\textunderscore ?? ?? ???????? ? × ?????????\textunderscore ?? ?? ???????? ??\textbf{(1)}????????\textunderscore ?? ???????? = ??????????\textunderscore ?? ?? ???????? ? 1? × ?????????\textunderscore ?? ?? ???????? ? 1??\textbf{(2)}\par
From the above equations, it is clear that??????????\textunderscore ?? ?? ???????? = ??????????\textunderscore ?? ?? ????????\textbf{(3)}\par
and ????????\textunderscore ?? ?? ???????? = ????????\textunderscore ?? ?? ???????? for ?? and ??\par
The encryption key pair of ?? and ?? represented as( ????????\textunderscore ?? ?? ???????? , ????????\textunderscore ?? ?? ???????? ) and ( ????????\textunderscore ?? ?? ???????? , ????????\textunderscore ?? ?? ???????? )\par
are to be obtained. The ??????????\textunderscore ?? ???????? is obtained by randomly selecting numbers such that it is a co prime of ????????\textunderscore ?? ???????? or in other terms:?ð?"?ð?"? ?????? (????????\textunderscore ?? ???????? , ????????\textunderscore ?? ???????? ) = 1\textbf{(5)}\par
where ?ð?"?ð?"? ?????? (??, ??) represents the greatest common divisor function between two variables ?? and ??.\par
The decryption key pair of ?? and ?? is represented by( ????????\textunderscore ?? ?? ???????? , ????????\textunderscore ?? ?? ???????? )\par
and ( ????????\textunderscore ?? ?? ???????? , ????????\textunderscore ?? ?? ???????? ) and the Property ????????\textunderscore ?? ???????? is computed based on the following????????\textunderscore ?? ???????? = ( ????????\textunderscore ?? ???????? ) ?1 ??????(????????\textunderscore ?? ???????? )\textbf{(6)}\par
Let ?????? ?? represent the encrypted data ?? . The encryption operation is defined as follows:?????? ?? = ?? ???????? \textunderscore ?? ???????? ??????(????????\textunderscore ?? ???????? )\textbf{(7)}\par
The commutative RSA decryption operation on the encrypted data ð?"¹ð?"¹ is defined as?????? ?? = ?? ???????? \textunderscore ?? ???????? ??????(????????\textunderscore ?? ???????? )\textbf{(8)}\par
b) Commutative property of RSA Algorithm\par
The commutative property of the RSA algorithm adopted in SMFCP can be proved if data X encrypted by A and then encrypted by B provides the same resultant if the encryption is performed by B followed by the encryption performed by A , i.e., 
\section[{Enc B (Enc}]{Enc B (Enc}x A ) ? Enc A (Enc x B ) (9) Enc B ? X Prop \textunderscore E A CRSA Mod(Prop\textunderscore N A CRSA )? ? Enc A ?X Prop \textunderscore E B CRSA Mod(Prop\textunderscore N B CRSA )?\textbf{(10)}X ?Prop \textunderscore E A CRSA ×Prop \textunderscore E B CRSA ? Mod ?Prop N A CRSA ? = X ?Prop \textunderscore E B CRSA ×Prop \textunderscore E A CRSA ? Mod(Prop\textunderscore N B CRSA )\textbf{(11)}\par
As Prop N A CRSA = Prop\textunderscore N B CRSA it can be concluded thatX ?Prop \textunderscore E A CRSA ×Prop \textunderscore E B CRSA ? Mod ?Prop N A CRSA ? = X ?Prop \textunderscore E B CRSA ×Prop \textunderscore E A CRSA ? Mod(Prop\textunderscore N A CRSA )\textbf{(12)}\par
And hence Enc B (Enc X A ) ? Enc A (Enc X B )\par
XIII Issue XV Version I 
\section[{( )}]{( )}\par
Year have implemented Commutative RSA cryptography core among multiple FPGA devices. In order to optimize the performance as well as memory occupancy, highly effective system architectures like Montgomery modular multiplication based on Radix-2 has been developed. Such implementation causes the reduction in memory occupancy as well as the speed is also enhanced many folds. These implemented approaches have been discussed in the following sections. 
\section[{a) Montgomery Algorithm}]{a) Montgomery Algorithm}\par
Montgomery multiplication \hyperref[b19]{[20]} is an efficient method for modular multiplication with an arbitrary modulus, particularly suitable for implementation on general-purpose computers and embedded microprocessors. The method is based on a representation of the residue class modulo ??. The algorithm uses simple divisions by a power of two instead of divisions by ??, which are used in a conventional modular operation. The Montgomery multiplication (MM) is the basic operation used in modular exponentiation, which is required in the Diffie-Hellman and RSA public-key cryptosystems.\par
Montgomery's modular multiplication algorithm employs only simple additions, subtractions, and shift operations to avoid trial division, a critical and timeconsuming operation in conventional modular multiplication. The price paid is the need to convert operands into and out of Montgomery's domain, which is almost negligible in some particular applications such as cryptosystems.\par
Montgomery Mathematically, it can be written as:MP(?? ? , B ? , M) = A ? . B ? . 2 ?n = (A. 2 ?? ). (B. 2 ?? ). 2 ?n = A. B. 2 ?? = (A. B) ? (mod M).\textbf{(14)}\par
The conversion between each domain can be done using the same Montgomery operation, in particular A ? = MP(A, 2 2n (mod M), M) and X = MP(A ? , 1, M) , where 2 2?? (mod M) can be precomputed. Despite the initial conversion cost, we achieve an advantage over ordinary multiplication if we do many Montgomery multiplications followed by an inverse conversion at the end, which is the case, for example, in our proposed RSA. 
\section[{b) Radix-2 Modular Multiplier}]{b) Radix-2 Modular Multiplier}\par
The optimized algorithm for Radix-2 Modular multiplier for Montgomery multiplication is given as follows:??????????: ?????? ??, ?? = ??????? 2 ??? + 1, (\textbf{15}) ?? = ? ?? ?? ???1 ??=0\par
. 2 ?? , ??????? 0 ? ??, ?? < ?? Proposed Commutative RSA Core Based on Serial Montgomery and Parallel Montgomery\par
The dominant goal of this research work is to implement and illustrate the efficiency and robustness of commutative RSA cryptography approach for multiple MIMO or transceiver systems and for this purpose, we1.1 X[0] = 0; (18) 1.2 ?????? ?? = 0 ???? ?? ? 1 ????; 1.3? ?? ?? = (?? ?? . ?? 0 ) ? X [??]??; X[?? + 1] = ??[??]+?? ?? .??+?? ?? .?? 2 ;\textbf{(19)}\par
The above mentioned algorithm represents the Pseudocode for the Radix-2 Montgomery multiplication, where we choose ?? = ??????? 2 ??? + 1. ?? is the size of M in bits.\par
The verification of the above algorithm may be presented as follows:\par
Consider X[i] given asX[??] ? 1 2 ?? ?? ?? ?? . 2 ?? ???1 ?? =0 ?. ??(?????? ??),\textbf{(21)}\par
With X[0]=0. Then ??[??] ? ??. ??.2 ??? (?????? ??) = ????(??, ??, ??). ??[??]\textbf{(22)}\par
can be computed iteratively using the following dependence:? ??[?? + 1] ? 1 2 ??+1 ?? ?? ?? . 2 ?? ?? ?? =0 ?. ?? (23) ? 1 2 ??+1 ?? ?? ?? . 2 ?? ?? ?? =0 + ?? ?? . 2 ?? ?. ?? (24) 1 2 ? 1 2 ?? ?? ?? ?? . 2 ?? ???1 ?? =0 ?. ?? + ?? ?? . ???\textbf{(25) 1 2}\par
(??[??] + ?? ?? . ??)(?????? ??).\par
Therefore, depending on the parity of X [??] + ?? ?? . ?? , we do compute X [?? + 1] as or ??[?? + 1] = ??[??]+??.??+?? 2 so as to make the numerator divisible by 2.\par
Since ?? < ?? and X [0] = 0, one has 0 ? ??[??] < 2?? for all 0 ? ?? < ?? . In References \hyperref[b20]{[21]} and \hyperref[b21]{[22]}, the result of a Montgomery multiplication is presented as ??. ??. 2 ??? (?????? ??) < 2?? when ??, ?? < 2?? and 2 ?? > 4??. As a result, by redefining "n" to be the smallest integer such that 2 ?? > 4?? , the subtraction at the end of algorithm can be avoided and the output of the multipication can be directly used as an input for the next Montgomery multiplication. 
\section[{c) Modular Multiplication Algorithms}]{c) Modular Multiplication Algorithms}\par
In RSA, the public encryption key is a pair of positive integers (E, N) and the private decryption key is another pair of positive integers (D, N). To encrypt a message using the key (E, N) the following structural approach have been implemented. Fig.  {\ref 1} represents the Serial Montgomery multiplication, whereas the parallel Montgomery is presented in Fig.  {\ref 2}. It encompasses two Montgomery multipliers connected in parallel. In our research work, we have implemented ?????????? ? 2 Modular multiplier based multiplication architecture. A brief description of the employed algorithm is as follows: CONTROLLER MUX22 MUX22 T 1 E 1 0 1 ei e0/1 0 MPRODUCT1 SQUARE1 SAMMM1 SAMMM2 MODULUS M SQUARE1.1 MPRODUCT1.1 
\section[{Hardware Design}]{Hardware Design}\par
Fig.  {\ref 2} presented earlier shows the architecture of a 32-bit RSA processor based on the proposed Commutative RSA algorithm. We use four 32-bit linear shift registers to store operands needed in computing 32-bit RSA operation. The operations of the RSA processor are described in the following. In the initial stage, commutative RSA operands are loaded into shift registers serially through an input buffer. While loading message M into the text register, we shift the exponent register until the first nonzero is the most significant bit and count the number of bits of exponent log 2 E. After the initial stages, we start the multiplier. Once the first output bit of the multiplier is ready, we start the Montgomery module immediately. So the execution time of CPA, multiplier, and Montgomery module is almost overlapped. Therefore, the function units of our design are fully utilized during computation.\par
Carry-Propagation Adder and Serial Parallel Multiplier: The carry-propagation adder converts the carry-save form of the output from the Montgomery module to non-redundant binary form. It generates one bit output per cycle to the serial-parallel multiplier for the next iteration. The serial-parallel multiplier is used to realize the multiplication and square of two n +1 bit numbers. It first generates the n + 2 lower bits of a product serially to the Montgomery module, and then it stops and holds the n higher bit of the product. The n higher bits of the product will be added with the output of the Montgomery module to get the modular multiplication result.\par
The multiplier itself is a linear array type with a special input circuit. When the multiplier is generating a product of two numbers, the parallel input M0 is ready in the text register and another operand can arrive in serial. However, if we want to square one number, a serial input of the operand will make the multiplier fail.\par
We solved this problem by scheduling the serial input operands and insert some zeros to avert the failure of the squaring operation. 
\section[{Montgomery}]{Montgomery}\par
Module:\par
The Montgomery module is shown in Fig.  {\ref 2} and the overall operation for Montgomery modular multiplication and its functional approach has already been presented in previous sections. The variable X[0] refers the n+2 lower bit of the product from the multiplier. X[0] enters the Montgomery module one bit per cycle from the lower bit to the higher bit in series. The reduction step is a shift-and-add operation that is very similar to the basic step of a multiplication. The quotient determination is a parity decision on the summation of the intermediate result and the carry. This can be done simply by an exclusive-OR gate with inputs of ??[i] and the LSB of the intermediate result in the previous iteration. After n + 2 iterations, the Montgomery module will add X [n + 2] and the ?? higher bits of the product from the multiplier together. The result is then sent to the carry-propagation adder for the next modular multiplier iteration.\par
In this work, we have developed two CRSA cryptography cores. First model represents the Serial Montgomery multiplier based design, while the second describes the optimized Parallel Montgomery based CRSA cryptography core implementation. In parallel Montgomery approach, two Montgomery multipliers have been used in parallel.\par
The results obtained after implementation have been summarized in the following sections. 
\section[{VI.}]{VI.} 
\section[{Results}]{Results}\par
The robust commutative RSA core, whose details were presented in earlier sections, has been implemented on multiple FPGA devices for simulation and illustration of data authenticity among multiple user terminals in a communication environment. The Even in the proposed system, the trade-off between power consumption is also very small and it is only 0.03\% higher in Parallel Montgomery based CRSA.\par
The simulation results for encryption and decryption obtained by the Serial Montgomery based ???????? core is presented in Fig. \hyperref[fig_3]{3} and Fig.  {\ref 4} respectively. The functional verification of the Parallel Montgomery based ???????? cryptographic core is shown in Fig.  {\ref 5} and Fig.  {\ref 6}.     The graphical comparison for the performance of Serial and Parallel Montgomery based Commutative RSA architectures has been presented in Fig.  {\ref 7} to Fig.  {\ref 10}.  
\section[{XIII Issue XV Version}]{XIII Issue XV Version} 
\section[{Conclusion}]{Conclusion}\par
A noble security or authentication public key cryptography technique called Commutative RSA has been implemented for multiple MIMO or transceiver terminals for accomplishing the goal of data security in multiuser communication environment. The commutative RSA approach has been implemented with multiple FPGA cores that functions as individual transceiver terminal and performs its encryption and decryption individually without affecting the original data. The two approaches based on Montgomery multiplication with Radix-2 multiplier have been designed and individual modules for Serial Montgomery (SM) and Parallel Montgomery have been simulated. The results obtained have been compared and it has been found that the proposed Parallel Montgomery (PM) architecture performs better as compared to Serial Montgomery. The proposed PM based CRSA cryptography core has exhibited 12.1\% higher throughput as compared to Serial Montgomery based CRSA. Similarly, the frequency or speed of the proposed system is also higher. The proposed system exhibits trade-off of 0.03\% in power consumption. Thus considering various aspects of this research work, it can be stated that the proposed Parallel Montgomery based Commutative RSA performs better than the serial based Montgomery multiplication application.\begin{figure}[htbp]
\noindent\textbf{16}\includegraphics[]{image-2.png}
\caption{\label{fig_0}( 16 )}\end{figure}
 \begin{figure}[htbp]
\noindent\textbf{12}\includegraphics[]{image-3.png}
\caption{\label{fig_1}Figure 1 :Figure 2 :}\end{figure}
 \begin{figure}[htbp]
\noindent\textbf{}\includegraphics[]{image-4.png}
\caption{\label{fig_2}}\end{figure}
 \begin{figure}[htbp]
\noindent\textbf{3}\includegraphics[]{image-5.png}
\caption{\label{fig_3}Figure 3 :}\end{figure}
 \begin{figure}[htbp]
\noindent\textbf{456}\includegraphics[]{image-6.png}
\caption{\label{fig_4}Figure 4 :Figure 5 :Figure 6 :}\end{figure}
  \begin{figure}[htbp]
\noindent\textbf{1} \par 
\begin{longtable}{P{0.4788209606986899\textwidth}P{0.18187772925764192\textwidth}P{0.1893013100436681\textwidth}}
\multicolumn{3}{l}{Serial and Parallel Montgomery based CRSA}\\
\multicolumn{2}{l}{cryptography Core}\tabcellsep \\
CRYPTOGRAPHY CORE\tabcellsep CRSA\tabcellsep CRSA\\
CIRCUIT\tabcellsep SERIAL MONTGOMERY\tabcellsep PARALLEL MONTGOMERY\\
DEVICE\tabcellsep xc5vlx330t-2-ff1738\tabcellsep xc5vlx330t-2-ff1738\\
SLICE LUT\tabcellsep 913\tabcellsep 844\\
LUT USED AS LOGIC\tabcellsep 913\tabcellsep 813\\
OCCUPIED SLICES\tabcellsep 290\tabcellsep 311\end{longtable} \par
 
\caption{\label{tab_1}Table 1 :}\end{figure}
 \begin{figure}[htbp]
\noindent\textbf{2} \par 
\begin{longtable}{P{0.31914498141263936\textwidth}P{0.12639405204460966\textwidth}P{0.2938661710037175\textwidth}P{0.0537174721189591\textwidth}P{0.056877323420074344\textwidth}}
\tabcellsep \tabcellsep STATIC POWER (mW)\tabcellsep 3516.7\tabcellsep 3516.75\\
\tabcellsep \tabcellsep DYNAMIC POWER (mW)\tabcellsep 4.76\tabcellsep 5.72\\
\tabcellsep \tabcellsep TOTAL POWER (mW)\tabcellsep 3521.46\tabcellsep 3522.47\\
\multicolumn{3}{l}{and proposed Parallel Montgomery based Commutative}\\
\multicolumn{3}{l}{RSA cryptography core}\\
CRYPTOGRAPHY CORE\tabcellsep CRSA\tabcellsep CRSA\\
CIRCUIT\tabcellsep SERIAL MONTGOMERY\tabcellsep PARALLEL MONTGOMERY\\
DEVICE\tabcellsep xc5vlx330t-2-ff1738\tabcellsep xc5vlx330t-2-ff1738\end{longtable} \par
 
\caption{\label{tab_2}Table 2 :}\end{figure}
 \begin{figure}[htbp]
\noindent\textbf{3} \par 
\begin{longtable}{P{0.48661710037174716\textwidth}P{0.24014869888475837\textwidth}P{0.12323420074349442\textwidth}}
\multicolumn{3}{l}{Throughput) Analysis for Serial and Parallel Montgomery}\\
\multicolumn{3}{l}{Based CRSA Cryptography Core}\\
CRYPTOGRAPHY CORE\tabcellsep CRSA\tabcellsep CRSA\\
CIRCUIT\tabcellsep SERIAL MONTGOMERY\tabcellsep PARALLEL MONTGOMERY\\
DEVICE\tabcellsep \multicolumn{2}{l}{xc5vlx330t-2-ff1738 xc5vlx330t-2-ff1738}\\
FREQUENCY (MHz)\tabcellsep 199.57\tabcellsep 227.08\\
DELAY (ns)\tabcellsep 5.01\tabcellsep 4.40\\
THROUGHPUT(kbps)\tabcellsep 779.58\tabcellsep 887.02\end{longtable} \par
 
\caption{\label{tab_3}Table 3 :}\end{figure}
 			\footnote{© 2013 Global Journals Inc. (US)} 			\footnote{© 2013 Global Journals Inc. (US) 1.5 ?X[??] = ??[??] ? ??; 1.6 ð??"ð??"??????ð??"ð??"?? ?? = X[??] (20) 1.4 X[??] > ?? ????????} 			\footnote{© 2013 Global Journals Inc. (US) Volume} 		 		\backmatter  			  				\begin{bibitemlist}{1}
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\end{document}
