@incollection{,
	
					
					
					7874FC3D49DBBA25A6A73F8756D991B9
				,
	author={{Ch. AshokBabu} and {J.V.R.Ravindra} and {K. LalKishore} and {Swami Vivekananda Institute of Technology}},
	journal={{Global Journal of Researches in Engineering}},
	journal={{GJRE}}2249-45960975-586110.34257/gjre,
	address={Cambridge, United States},
	publisher={Global Journals Organisation}13142730
}

@incollection{b0,
	
	
		,
	title={{An Improved SOI CMOS Technology Based Circuit Technique for Effective Reduction of Standby Subthreshold Leakage}}
		,
	author={{
			MdManish Kumar1
		} and {
			Anwar Hussain1
		} and {
			KSajal
		} and {
			Paul2
		}}
		
		
		
	
	
		,
	journal={{Circuits and Systems, Scientific Research}}
		
			
			,
	year={October 2013, 4}
		
	

}

@incollection{b1,
	
	
		,
	title={{The Potential of Ultrathin-Film SOI Devices for Low-Power and High-Speed Applications}}
		,
	author={{
			YKado
		}}
	
	
		,
	journal={{IEICE Transactions on Electronics}}
		
			3
			
			,
	year={1997}
		
	

}

@incollection{b2,
	
	
		,
	title={{Recent Advances in SOI Materials and Device Technologies for High Temperature}}
		,
	author={{
			SCristoloveanu
		} and {
			GReichert
		}}
		
	
	
		,
	booktitle={{Proceedings of High-Temperature Electronic Materials, Devices and Sensors}}
				High-Temperature Electronic Materials, Devices and SensorsSan Diego
		
			,
	year={22-27 February 1998}
			
		
	

}

@incollection{b3,
	
	
		,
	title={{Single Chip Wireless Systems Using SOI}}
		,
	author={{
			RReedy
		}}
	
	
		,
	booktitle={{Proceedings of the International SOI Conference}}
				the International SOI ConferenceSan Diego
		
			,
	year={4-7 October 1999}
			
		
	

}

@incollection{b4,
	
	
		,
	title={{Performance/ Complexity Space Exploration: Bulk vs. SOI}}
		,
	author={{
			SJAbou-Samra
		} and {
			AGuyot
		}}
		
	
	
		,
	booktitle={{Proceedings of the International Workshop on Power and Timing Modelling, Optimization and Simulation, Lyngby}}
				the International Workshop on Power and Timing Modelling, Optimization and Simulation, Lyngby
		
			,
	year={October 1998}
			
		
	

}

@incollection{b5,
	
	
		,
	title={{A New Design of the CMOS Full Adder}}
		,
	author={{
			NZhuang
		} and {
			HWu
		}}
		
	
	
		,
	journal={{IEEE Journal of Solid-state Circuits}}
		
			27
			5
			
			,
	year={1992}
		
	

}

@incollection{b6,
	
	
		,
	title={{A High-Speed Hybrid Full Adder}}
		,
	author={{
			RKNavi
		} and {
			MdRezaSaatchi
		} and {
			ODaei
		}}
		
		
	
	
		,
	journal={{European Journal of Scientific Research}}
		
			26
			1
			
			,
	year={2009}
		
	

}

@book{b7,
	
	
		,
	title={{Designing Low-Power Energy Recovery Adders Based On Pass Transistor Logic}}
		,
	author={{
			DSoudris
		} and {
			VPavlidis
		} and {
			AThanailakis
		}}
		
		
		
			,
	year={2001}
			,
	publisher={IEEE}
		
	

}

@book{b8,
	
	
		,
	title={{A Novel Low Power Energy Recovery Full Adder Cell}}
		,
	author={{
			RShalem
		} and {
			EJohn
		} and {
			LKJohn
		}}
		
		
		
	
	,
	note={publisher unknown}

}

@book{b9,
	
	
		,
	title={{Ultra Low-Power Full-Adder for Biomedical Applications}}
		,
	author={{
			ESChew
		} and {
			MWPhyu
		} and {
			WLGoh
		}}
		
		
		
			,
	year={2009}
		
	
	,
	note={IEEE pp115-118}

}

@incollection{b10,
	
	
		,
	title={{Design of robust, energy efficient full adders for deep-submicrometer design using hybrid CMOS logic style}}
		,
	author={{
			SGoel
		} and {
			AKumar
		} and {
			MABayoumi
		}}
		
		
	
	
		,
	journal={{IEEE Transactions on VLSI Systems}}
		
			4
			12
			
			,
	year={2006}
		
	

}

@incollection{b11,
	
	
		,
	title={{Designing Carry Look-Ahead Adders with an Adiabatic Logic Standard-Cell Library}}
		,
	author={{
			ABlotti
		} and {
			RCastellucci
		} and {
			Saletti
		}}
		
		
	
	
		,
	journal={{PATMOS}}
		
			
			,
	year={2002}
		
	

}

@incollection{b12,
	
	
		,
	title={{Implementation of Low Power Digital Multipliers Using 10 Transistor Adder Blocks}}
		,
	author={{
			KDhireesha
		} and {
			John
		}}
		
	
	
		,
	journal={{Journal of Low power Electronics}}
		
			3
			
			,
	year={2005}
		
	

}

@incollection{b13,
	
	
		,
	title={{Performance Evaluation of Adiabatic Gates}}
		,
	author={{
			MAlioto
		} and {
			GPalumbo
		}}
		
	
	
		,
	journal={{IEEE Trans on Circuits and Systems-I}}
		
			47
			9
			
			,
	year={2000}
		
	

}

@incollection{b14,
	
	
		,
	title={{A Comparison of Some Circuit Schemes for Semi-Reversible Adiabatic Logic}}
		,
	author={{
			ABlotti
		} and {
			. S DiPascoli
		} and {
			RSaletti
		}}
		
		
	
	
		,
	journal={{International Journal of Electronics}}
		
			89
			2
			
			,
	year={2002}
		
	

}