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\setlength{\parindent}{0pt}\raggedright \textcolor{GJMediumGrey}{\rule{\textwidth}{2pt}} \vskip16pt \textcolor{GJBlue}{\large\bfseries\abstractname\space} }{% \vskip8pt \textcolor{GJMediumGrey}{\rule{\textwidth}{2pt}} \vskip16pt } \usepackage[absolute,overlay]{textpos} \makeatother \usepackage{lineno} \linenumbers \begin{document} \author[1]{ramani kannan} \author[2]{Mr. Venus.V} \affil[1]{ K.S.Rangasamy College of Technology, Tiruchengode, Tamilnadu, India} \renewcommand\Authands{ and } \date{\small \em Received: 11 December 2012 Accepted: 3 January 2013 Published: 15 January 2013} \maketitle \begin{abstract} Multilevel inverter is as one of the most recent and popular type of advances in power electronics. It synthesizes desired output voltage waveform from several dc sources used as input for the multilevel inverter. This paper describes a diode-clamped five-level inverter-based battery/super capacitor direct integration scheme for photovoltaic energy systems. The study is carried out for three cases. In the first case, one of the two dc-link capacitors of the inverter is replaced by a battery bank and the other by a super capacitor bank. In the second case, dc-link capacitors are replaced by two battery banks. In the third case, ordinary dc-link capacitors are replaced by two super capacitor banks. The first system is supposed to mitigate both long-term and short-term power fluctuations while the last two systems are intended for smoothening long-term and short-term power fluctuations, respectively. These topologies eliminate the need for interfacing dcâ??"dc converters and thus considerably improve the overall system efficiency. The major issue in aforementioned systems is the unavoidable imbalance in dc-link voltages. An analysis on the effects of unbalance and a space vector modulation method, which can produce undistorted current even in the presence of such unbalances, are presented in this paper. Simulation work is done using the MATLAB software which validates the proposed method and finally THD comparison is presented for analysis \end{abstract} \keywords{diode-clamped five-level inverter, direct integration of battery energy storage systems, space vector modulation, unbalanced operation of diode-clampe} \begin{textblock*}{18cm}(1cm,1cm) % {block width} (coords) \textcolor{GJBlue}{\LARGE Global Journals \LaTeX\ JournalKaleidoscope\texttrademark} \end{textblock*} \begin{textblock*}{18cm}(1.4cm,1.5cm) % {block width} (coords) \textcolor{GJBlue}{\footnotesize \\ Artificial Intelligence formulated this projection for compatibility purposes from the original article published at Global Journals. However, this technology is currently in beta. \emph{Therefore, kindly ignore odd layouts, missed formulae, text, tables, or figures.}} \end{textblock*} \let\tabcellsep& \section[{Implementation of Closed Loop System for Diode Clamped Multilevel Inverter with Stand-Alone Photovoltaic Input}]{Implementation of Closed Loop System for Diode Clamped Multilevel Inverter with Stand-Alone Photovoltaic Input}\par Venus.V \& K.Ramani A Abstract -Multilevel inverter is as one of the most recent and popular type of advances in power electronics. It synthesizes desired output voltage waveform from several dc sources used as input for the multilevel inverter. This paper describes a diode-clamped five-level inverter-based battery/super capacitor direct integration scheme for photovoltaic energy systems. The study is carried out for three cases. In the first case, one of the two dc-link capacitors of the inverter is replaced by a battery bank and the other by a super capacitor bank. In the second case, dc-link capacitors are replaced by two battery banks. In the third case, ordinary dc-link capacitors are replaced by two super capacitor banks. The first system is supposed to mitigate both long-term and short-term power fluctuations while the last two systems are intended for smoothening long-term and short-term power fluctuations, respectively. These topologies eliminate the need for interfacing dc-dc converters and thus considerably improve the overall system efficiency. The major issue in aforementioned systems is the unavoidable imbalance in dclink voltages. An analysis on the effects of unbalance and a space vector modulation method, which can produce undistorted current even in the presence of such unbalances, are presented in this paper. Simulation work is done using the MATLAB software which validates the proposed ethod and finally THD comparison is presented for analysis. \section[{Introduction}]{Introduction}\par ultilevel converters are mainly utilized to synthesis a desired single or three-phase voltage waveform. The desired multi staircase output voltage is obtained by combining several dc voltage sources. Solar cells, fuel cells, batteries and ultra capacitors are the most common independent sources used. The intermittent nature of renewable energy sources can create serious system stability issues, especially at increased levels of penetration \hyperref[b0]{[1]}, \hyperref[b1]{[2]}. Renewable energy resources will be an Increasingly important part of power generation in the new millennium. Besides assisting in the reduction of the emission of greenhouse gases, they add the muchneeded flexibility to the energy resource mix by decreasing the dependence on fossil fuels. Recently, batteries and super capacitors have emerged as leading energy storage devices \hyperref[b2]{[3]}- \hyperref[b5]{[6]}.Furthermore, the combination of battery and super capacitor provides an excellent match that can cover a wide range of power and energy requirements \hyperref[b4]{[5]}, \hyperref[b14]{[15]}. The simplest way of adding a battery (or a super capacitor) bank is the direct connection to the dc link of the grid side inverter, as shown in Fig. \hyperref[fig_2]{1(a)}. But it suffers from several drawbacks such as large internal resistance, fixed current distribution governed by internal resistors, and lack of control over the power flow \hyperref[b7]{[8]} .Effects of these issues can somewhat be reduced if an intermediate dc-dc converter is placed between the ve Therefore, the possible alternative ways of connection to avoid additional dc-dc converter while maintaining the control flexibility. The result is the simple configuration shown in Fig. \hyperref[fig_2]{1(c}). In the figure, the dc-link capacitors of a standard diode-clamped five-level inverter are replaced by a battery bank and a super capacitor bank. Latter part of this paper discusses two more cases: one with two super capacitor banks and the other with two battery banks. If a change in the source or the load happens, the power imbalance will be compensated by the battery bank and/or super capacitor bank.V i i V n n V in dc V - V ce\par The main issue with this particular topology is the imminent imbalance of the neutral point potential which is due to unequal states of charge of the battery bank and the super capacitor bank. Comprehensive analysis on capacitor voltage unbalance and balancing techniques used in diode-clamped inverters can be found in the literature \hyperref[b0]{[1]}, \hyperref[b7]{[8]}.A new Space Vector Modulation (SVM) method has been developed for diode-clamped five-level inverters with variable dc-link voltages. Furthermore, full controllability over small vector selection is available in the proposed SVM method. Relevant equations and diagrams are given in Section III with a detailed analysis. The proposed SVM technique involves more computations compared to simplified SVM techniques proposed in the literature. The THD values for the Traditional, Conventional and proposed inverters are compared and analysed. \section[{II. Unbalanced Dc-Link Voltages Effects}]{II. Unbalanced Dc-Link Voltages Effects}\par For the diode-clamped Five-level inverter, shown in Fig. \hyperref[fig_2]{1(c}), line-to-ground voltages can be derived from switching states Sa, Sb, and Sc, and the results are given in Table {\ref I}. If the inverter is connected to a balanced three-phase load, corresponding phase voltages can be derived from line-to-ground voltages using (1). Then, these phase voltages are transformed into the dq reference frame by \hyperref[b1]{(2)}. The locations of small and medium vectors vary with dc-link voltages as shown in Fig. \hyperref[fig_3]{2}. However, locations of large vectors (2 0 0, 2 2 0, 0 2 0, 0 2 2, 0 0 2, and 2 0 2) depend only on the total dc-link voltage and would remain unchanged if the total voltage is constant. When capacitor voltages are balanced, positive and negative small vectors (2 1 1, 2 2 1, 1 2 1, 1 2 2, 1 1 2, 2 1 2, 1 0 0, 1 1 0, 0 1 0, 0 1 1, 0 0 1, and 1 0 1) coincide and only one inner hexagon is formed as shown in Fig. \hyperref[fig_3]{2(b}). Furthermore, medium vectors (2 1 0, 1 2 0, 0 2 1, 0 1 2, 1 0 2, and 2 0 1) reach midpoints of the outer hexagon. If an unbalance is present, small vectors split and two separate inner hexagons appear as shown in Fig. \hyperref[fig_3]{2(a) and (c}). In addition to that, medium vectors move toward large vectors. The size of the inner hexagon formed with negative small vectors depends on the battery voltage, which is nearly constant in the proposed system. Similarly, the size of the inner hexagon formed with positive small vectors varies with the super capacitor voltage. The circles marked with dotted lines in Fig. \hyperref[fig_3]{2} represent the path of the reference voltage vector. In the proposed method, the super capacitor voltage is allowed to vary in a way that this circle will always remain within the outer hexagon and middle inner hexagon. If the normal SPWM with two equal carriers, as shown in Fig. \hyperref[fig_4]{3} Therefore, a novel space vector modulation method has been developed, from the scratch, to reduce voltage stresses and to produce desired fundamental components even at large imbalanced conditions. The result of the proposed SVM technique is shown in Fig. \hyperref[fig_4]{3(h)}. Its fundamental component is very similar to that of the waveforms shown in Fig. \hyperref[fig_4]{3}(g), and hence, it is not shown here exclusively. A detailed description of the proposed SVM technique is given in Section III. of the reference voltage vector are generated by the grid side inverter controller. Currently, serving sector of the space vector diagram is derived from the phase angle. However, due to the presence of two candidate triangles, four different limit angles, 1, 2, 3 , and 4 , need to be calculated for a given sector. First two limit angles ( 1 and 2 ) are related to the triangles formed with lower small vectors as shown in Fig. {\ref 5}(a) whereas the other two limit angles {\ref ( 3 and 4 )} are associated with the triangles formed with positive small vectors as shown in Fig. {\ref 5(b)}. For the simplicity of subsequent calculations, dc-link voltages are transformed into two variables x and y using \hyperref[b4]{(5)}. \section[{III. Implementation of Svm Technique}]{III. Implementation of Svm Technique}\par These two values are directly related to the lengths of triangles as marked in Fig. {\ref 4}. Limit angles are calculated using ( {\ref 6})- \hyperref[b9]{(10)}, where is an intermediate variable. The limit angles given in ( {\ref 7})-( {\ref 10}) are valid only for sector 1. Once the limit angles are calculated, the triangle and corresponding three vectors can easily be derived. After finding the three vectors, the next step is to determine switching times. According to the wellknown volt-second balancing principle, a given reference vector can be synthesized by three adjacent vectors. Equations ( {\ref 11}) and ( {\ref 12}) provide the mathematical description of this process. Equations ( {\ref 13})-( {\ref 16}) are used to calculate corresponding switching times d1 d3 that are expressed as fractions of the sampling time.\par IV. \section[{Simulation and Results}]{Simulation and Results}\par The five level diode clamped multilevel inverter simulation results and analysis describe in this section. The simulation diagram for space vector Modulation is shown in Figure {\ref 7}.With the use of this proposed method harmonics are eliminated. Therefore the efficiency of the inverter is increased. Some soft switching method can be used for multilevel inverter to reduce the switching loss and to increase the efficiency. The figure \hyperref[fig_11]{14} Total Harmonics Distortion for open loop system. The Total harmonic distortion of a signal is a measurement of the harmonic distortion present and is defined as the ratio of the sum of the powers of all harmonic components to the power of the fundamental frequency. THD is used to characterize the linearity of audio systems and the power quality of electric power systems. From the table 3 different inverter THD values are compared. The proposed inverter THD value is obtained as 10.16\%, which is the best among all. This shows that quality of the five level inverter is improved.\par V. \section[{Conclusion}]{Conclusion}\par This paper is the first step to develop a complete solar photovoltaic power electronic conversion system in simulation. The Proposed topologies eliminate the need for additional dc-dc converters by connecting two battery banks, two super capacitor banks or a battery bank, and a super capacitor bank directly across dc links of a diode clamped five-level inverter. Unavoidable dc-link voltage imbalance is the major issue with these topologies. This problem is handled by a novel space vector modulation technique. Further work is needed to improve the efficiency by reducing THD and the hardware will be designed for different power levels. The THD values for the Traditional, Conventional and proposed inverters are compared and analysed. \begin{figure}[htbp] \noindent\textbf{1}\includegraphics[]{image-2.png} \caption{\label{fig_0}Fig. 1 (}\end{figure} \begin{figure}[htbp] \noindent\textbf{}\includegraphics[]{image-3.png} \caption{\label{fig_1}}\end{figure} \begin{figure}[htbp] \noindent\textbf{1}\includegraphics[]{image-4.png} \caption{\label{fig_2}Table 1 :}\end{figure} \begin{figure}[htbp] \noindent\textbf{2}\includegraphics[]{image-5.png} \caption{\label{fig_3}Fig. 2 (}\end{figure} \begin{figure}[htbp] \noindent\textbf{3}\includegraphics[]{image-6.png} \caption{\label{fig_4}Fig. 3 :}\end{figure} \begin{figure}[htbp] \noindent\textbf{44}\includegraphics[]{image-7.png} \caption{\label{fig_5}Fig. 4 (Fig. 4 (}\end{figure} \begin{figure}[htbp] \noindent\textbf{}\includegraphics[]{image-8.png} \caption{\label{fig_6}}\end{figure} \begin{figure}[htbp] \noindent\textbf{5637}\includegraphics[]{image-9.png} \caption{\label{fig_7}Fig 5 :Fig 6 : 3 .Fig. 7 :}\end{figure} \begin{figure}[htbp] \noindent\textbf{8}\includegraphics[]{image-10.png} \caption{\label{fig_8}Fig. 8 :}\end{figure} \begin{figure}[htbp] \noindent\textbf{9}\includegraphics[]{image-11.png} \caption{\label{fig_9}Fig. 9 :}\end{figure} \begin{figure}[htbp] \noindent\textbf{1112}\includegraphics[]{image-12.png} \caption{\label{fig_10}Fig. 11 :FigFig. 12 :}\end{figure} \begin{figure}[htbp] \noindent\textbf{14}\includegraphics[]{image-13.png} \caption{\label{fig_11}Fig. 14 :}\end{figure} \begin{figure}[htbp] \noindent\textbf{15}\includegraphics[]{image-14.png} \caption{\label{fig_12}Fig. 15 :}\end{figure} \begin{figure}[htbp] \noindent\textbf{2} \par \begin{longtable}{P{0.204\textwidth}P{0.12466666666666666\textwidth}P{0.204\textwidth}P{0.31733333333333336\textwidth}} Kind of the MLI\tabcellsep 2 Level MLI\tabcellsep 3 Level MLI\tabcellsep 5 Level Propose d MLI\\ THD\tabcellsep \tabcellsep 53.84\%\tabcellsep 10.16\%\end{longtable} \par \caption{\label{tab_0}Table 2 :}\end{figure} \footnote{F © 2013 Global Journals Inc. (US)} \footnote{F © 2013 Global Journals Inc. (US)} \footnote{F © 2013 Global Journals Inc. (US)} \footnote{F © 2013 Global Journals Inc. (US)} \backmatter \begin{bibitemlist}{1} \bibitem[Ewanchuk and Salmon ()]{b10}\label{b10} ‘A Five-/Nine-Level Twelve-Switch Neutral-Point-Clamped Inverter for High-Speed Electric Drives’. Jeffrey Ewanchuk , John Salmon . \textit{IEEE Transactions on Industry Applications} 2011. 47 (5) p. . \bibitem[ Alirezanami ()]{b0}\label{b0} ‘A Hybrid Cascade Converter Topology with Series-Connected Symmetrical and Asymmetrical Diode-Clamped H Bridge Cells’. Alirezanami , Firuzzare . \textit{IEEE Transactions on Power Electronics} 2011. 26 (1) p. . \bibitem[Akagi and Hasegawa ()]{b8}\label{b8} ‘A New DC-voltage-Balancing Circuit Including a Single Coupled Inductor for a Five-Level Diode-Clamped PWM Inverter’. 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