@incollection{,
	
					
					
					EC54FEB67DE81218343A71A466898ADD
				,
	author={{Sherif M.Sharroush} and {Port Said University.}},
	journal={{Global Journal of Researches in Engineering}},
	journal={{GJRE}}2249-45960975-586110.34257/gjre,
	address={Cambridge, United States},
	publisher={Global Journals Organisation}177114
}

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	title={{Digital Integrated Circuit Design}}
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	title={{Use of Charge Sharing to Reduce Energy Consumption in Wide Fan-In Gates}}
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	title={{Optimizing CMOS Circuits for Low Power Using Transistor Reordering}}
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@incollection{b4,
	
	
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	title={{Minimization of Power in VLSI Circuits Using Transistor Sizing, Input Ordering, and Statistical Power Estimation}}
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			CTan
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	title={{A Conditional Isolation Technique for Low-Energy and High-Performance Wide Domino Gates}}
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			HRLin
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	year={30 Oct. -2 Nov. 2007}
		
	

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@incollection{b6,
	
	
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	title={{Novel Timing Yield Improvement Circuits for High-Performance Low-Power Wide Fan-In Dynamic OR Gates}}
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	author={{
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@incollection{b7,
	
	
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	title={{Current Comparison Based High Speed Domino Circuits}}
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@incollection{b8,
	
	
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	title={{High Speed and Leakage-Tolerant Domino Circuits for High Fan-in Applications in 70nm CMOS Technology}}
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@incollection{b9,
	
	
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	title={{Low Leakage High Speed Domino Circuit For Wide Fan-in Equality Comparator}}
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@book{b19,
	
	
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	title={{Digital Integrated Circuits: Analysis and Design}}
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@book{b20,
	
	
		
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@incollection{b21,
	
	
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	title={{Ordering}}
	
	
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}