@incollection{,
	
					
					
					C44FC2BD1F51F3F1F12409B7997F4E41
				,
	author={{Miss. Musle DipaliB.} and {Miss. Musle DipaliB.} and {Bharati vidyapeeths college of engg for women pune}},
	journal={{Global Journal of Researches in Engineering}},
	journal={{GJRE}}2249-45960975-586110.34257/gjre,
	address={Cambridge, United States},
	publisher={Global Journals Organisation}1722126
}

@incollection{b0,
	
	
		,
	title={{A high speed AES design resistant to fault injection attacks}}
		,
	author={{
			FatmakahriHassenmestiri
		} and {
			MohsenBelgacembouallegue
		} and {
			Machhout
		}}
		
		
	
	
		,
	journal={{Microprocessors and Microsystems journal}}
		
			
			,
	year={2016}
			,
	publisher={Elsevier}
		
	

}

@incollection{b1,
	
	
		,
	title={{Modeling and Simulation of Multi-Operation Microcode based Built-In Self Test for Memory Fault Detection and Repair}}
		,
	author={{
			R KDr
		} and {
			Sharma Aditi
		} and {
			Sood
		}}
		
		
	
	
		,
	journal={{IEEE Annual Symposium on VLSI}}
		
			,
	year={2010}
		
	

}

@incollection{b2,
	
	
		,
	title={{Optimization of Microcode Built-In Self Test By Enhanced Faults Coverage for Embedded Memory}}
		,
	author={{
			VinodProf
		} and {
			MohammedKapse
		} and {
			Arif
		}}
		
		
	
	
		,
	booktitle={{IEEE Students' Conference on Electrical, Electronics and Computer Science}}
				
			,
	year={2012}
		
	

}

@incollection{b3,
	
	
		,
	title={{Efficient Designs of Multiported Memory on FPGA}}
		,
	author={{
			Bo-Cheng CharlesLai
		} and {
			IeeeMember
		} and {
			Jiun-LiangLin
		}}
		
		
	
	
		,
	booktitle={{ieee transactions on very large scale integration (vlsi) systems}}
				
			,
	year={2016}
		
	

}

@incollection{b4,
	
	
		,
	title={{Application specific multi-port memorycustomization in FPGAs}}
		,
	author={{
			GAMalazgirt
		} and {
			HEYantir
		} and {
			AYurdakul
		} and {
			SNiar
		}}
		
		
		
	
	
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	booktitle={{Proc. IEEE Int.Conf. Field Program. Logic Appl. (FPL)}}
				IEEE Int.Conf. Field Program. Logic Appl. (FPL)
		
			,
	year={Sep. 2014}
			
		
	

}

@incollection{b5,
	
	
		,
	title={{Memory Test Optimizationfor Parasitic Bit LineCoupling in SRAMs}}
	
	
		,
	booktitle={{IEEE International Test Conference}}
				,
	editor={
			Sandra Irobi Zaid Al-Ars SaidHamdioui
		}
		
			,
	year={2010}
		
	

}

@incollection{b6,
	
	
		,
	title={{Modelling and Simulation of Microcode Built-In Self test Architecture for Embedded Memories}}
		,
	author={{
			NZHaron
		} and {
			SA MJunos
		} and {
			AS AAziz
		}}
		
		
	
	
		,
	booktitle={{Proc. of IEEE International Symposium on Communications and Information Technologies}}
				of IEEE International Symposium on Communications and Information Technologies
		
			,
	year={2007}
			
		
	

}

@incollection{b7,
	
	
		,
	title={{State-of-art and Future Trends in Testing Embedded Memories}}
		,
	author={{
			SHamdioui
		} and {
			GNGaydadjiev
		} and {
			AJVan De Goor
		}}
		
		
	
	
		,
	booktitle={{International Workshop on Memory Technology, Design and Testing (MTDT'04)}}
				
			,
	year={2004}
		
	

}

@incollection{b8,
	
	
		,
	title={{A programmable BIST for DRAM testing and diagnosis}}
		,
	author={{
			PBernardi
		} and {
			MGrosso
		} and {
			MSReorda
		} and {
			YZhang
		}}
		
		
		
	
	
		,
	booktitle={{Test Conference (ITC)}}
				
			,
	year={2010. 2010}
			
		
	

}

@book{b9,
	
	
		,
	title={{Efficient multiported memories for FPGAs}}
		,
	author={{
			CELaforest
		} and {
			JGSteffan
		}}
		
		
	
	,
	note={inProc. 18th Annu}

}

@book{b10,
	
	
		,
	author={{
			Acm/SigdaInt
		}}
		,
	title={{Symp. Field Program.Gate Arrays}}
				
			,
	year={2010}
			
		
	

}

@book{b11,
	
	
		,
	title={{Series FPGAs Configurable Logic Block User Guide,accessed on}}
		,
	author={{
			Xilinx
		}}
		
		
			,
	year={May 30, 2016}
		
	

}

@incollection{b12,
	
	
		,
	title={{Multi-ported memories for FPGAs via XOR}}
		,
	author={{
			CELaforest
		} and {
			MGLiu
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			ERapati
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			JGSteffan
		}}
		
		
		
	
	
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	booktitle={{Proc. 20th Annu. ACM/SIGDA Int. Symp. Field Program. Gate Arrays (FPGA)}}
				20th Annu. ACM/SIGDA Int. Symp. Field Program. Gate Arrays (FPGA)
		
			,
	year={2012}
			
		
	

}