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      \def\TheFullDate{2015 2015-03-15 (revised: 23 Year 2015 15 March 2015)}
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\title{Modified Modulation Techniques for Cascaded Multilevel Inverter Fed Induction Motor Drive}
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\begin{document}

             \author[1]{Ch. Lokeshwar  Reddy}

             \author[2]{P. Satish  Kumar}

             \author[3]{M.  Sushama}

             \affil[1]{  CVR College of Engineering}

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\date{\small \em Received: 13 February 2015 Accepted: 4 March 2015 Published: 15 March 2015}

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\begin{abstract}
        


This paper presents modified Space Vector Pulse Width Modulation (SVPWM) techniques for Cascaded Multilevel Inverter. In the proposed SVPWM technique the reference signals are generated by adding offset voltage to the reference phase voltages. This SVPWM technique does not involve region identification, sector identification or look up tables for switching vector determination as are required in the conventional multilevel SVPWM technique It is also reduces the computation time compared to the conventional space vector PWM technique. The modulation signals are generated by comparing the reference phase voltages with triangular carrier signals. Cascaded multilevel inverter fed with Induction Motor and RL load is simulated for various carrier PWM techniques like PDPWM, PODPWM, APODPWM and PSCPWM. The simulation results are analysed and compared. Among the various modulation techniques, PDPWM is themost efficient one and has better spectral performance and better induction motor performance.

\end{abstract}


\keywords{cascaded multilevel inverter, SVPWM, offset voltage.}

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\let\tabcellsep& 	 	 		 
\section[{I. Introduction}]{I. Introduction}\par
any different PWM methods are available to achieve these aims: wide linear modulation range, reduced switching loss, lesser total harmonic distortion in the spectrum of switching waveform, easy implementation, less memory space and computation time on implementing digital processors. The most widely used PWM schemes for Multi-level inverters are the carrier based PWM (sinetriangle PWM or SPWM) and space vector based PWM. These modulation techniques have been studied extensively and compared for the performance parameters for two level inverters \hyperref[b0]{[1,}\hyperref[b1]{2]}.\par
The SPWM techniques are more flexible and simple to implement, but the maximum peak of the fundamental component in the output voltage is limited to 50\% of the DC link voltage and the extension of the SPWM techniques into over-modulation range is difficult \hyperref[b1]{[2]}.\par
The SVPWM technique presented for multi-level inverters can also work in the over-modulation range. The SVPWM technique gives more fundamental voltage and better harmonic performance compared with SPWM technique \hyperref[b2]{[3]}\hyperref[b3]{[4]}\hyperref[b4]{[5]}.The maximum peak of the fundamental component in the output voltage obtained with space vector pulse width modulation is 15\% more than with the sine-triangle modulation technique \hyperref[b1]{[2,}\hyperref[b2]{3]}. But the conventional space vector PWM technique requires sector identification and look-up tables to determine the timings for various switching vectors of the inverter in all the sectors \hyperref[b2]{[3,}\hyperref[b3]{4]}.This makes the implementation of the SVPWM technique is complicated.\par
Based on the arrangement of carrier waves, the PWM techniques can be classified as Phase Disposition (PD), Phase Opposition Disposition (POD), Alterative Phase Opposition Disposition (APOD), Phase Shifted Carrier PWM (PSCPWM). PD, POD and APOD are level shifted carrier PWM methods whereas; PSCPWM is the phase shifted carrier method.\par
This paper focuses on different control strategies and suitable modulation strategy is selected based on the outputs obtained through the simulations for cascaded multi-level inverters. 
\section[{a) Phase Disposition (PD)}]{a) Phase Disposition (PD)}\par
This technique requires (m-1) carrier waveforms for an m-level phase waveform. All the carriers are in same phase and level shifted equally. The Fig. \hyperref[fig_0]{1} shows the arrangement of carriers for eleven level cascaded multilevel inverter. The ten carrier signals with same phase but level shifted equally are compared with reference signal.  
\section[{b) Phase Opposition Disposition (POD)}]{b) Phase Opposition Disposition (POD)}\par
This technique requires (m-1) carrier waveforms for an m-level phase waveform. Half of the carrier waveforms above and below are in phase, but there is 1800 phase shift between the above and below half as shown in Fig.  {\ref 2}. The significant harmonics are located around the carrier frequency fc for both the phase and line voltage waveforms. 
\section[{Fig.2 : c) Alterative Phase Opposition Disposition (APOD)}]{Fig.2 : c) Alterative Phase Opposition Disposition (APOD)}\par
This technique requires (m-1) carrier waveforms for an m-level phase waveform. The carriers are phase displaced each other by 1800 alternatively as shown in Fig. \hyperref[fig_1]{3}. The most significant harmonics are centered as sidebands around the carrier frequency fc and therefore no harmonics occur at fc.  In this technique all the carriers are phase shifted by an angle 3600/N (where N is number of single phase inverter cells used in a phase leg). This strategy leads to the cancellation of all carrier and associated sideband harmonics up to 2Nth carrier group \hyperref[b5]{[6]}. Fig. \hyperref[fig_4]{4} shows the arrangement of carriers for an eleven level cascaded multilevel inverter.\par
For APOD, the first set of sideband harmonics is centered about the carrier frequency, while for PSCPWM the first set of sideband harmonics is centered about the 2Nth multiple of carrier frequency, where N is the number of h-bridges in each cascaded inverter phase leg. \hyperref[b6]{[7]}. The total number of switch transitions for PSCPWM is exactly 2N times the number of switch transitions for APOD. 
\section[{II. Modified svpwm}]{II. Modified svpwm}\par
The conventional SVPWM for multilevel inverters involves mapping of the outer sectors to an inner sub hexagon sector, to determine the switching time duration, for various inverter vectors. Then the switching inverter vectors corresponding to the actual sector are switched, for the time durations calculated from the mapped inner sectors. It is obvious that such a scheme, in multilevel inverters will be very complex, as large number of sectors and inverter vectors are involved. This will also considerably increase the computation time for real time implementation.\par
A carrier based PWM scheme has been presented \hyperref[b7]{[8]}, where sinusoidal references are added with a proper offset voltage before being compared with carriers, to achieve the performance of a SVPWM. The offset voltage computation is based on a modulus function depending on the DC link voltage, number of levels and the phase voltage amplitudes.\par
A modulation scheme is presented where a common mode voltage of suitable magnitude is added to the reference phase voltage throughout the duration \hyperref[b3]{[4,}\hyperref[b4]{5]}. A modulation technique is presented in \hyperref[b6]{[7]}, where a fixed common mode voltage is added to the reference phase voltage throughout the modulation range. It has shown \hyperref[b8]{[9]} that this common mode addition will not result in a SVPWM like performance, as it will not centre the middle inverter vectors in a sampling interval. The common mode voltage to be added in the reference phase voltages, to achieve SVPWM like performance is a function of the modulation index for multilevel inverters \hyperref[b8]{[9]}. A simplified method, to determine the correct offset times for centering the time durations of the middle inverter vectors, in a sampling interval is presented \hyperref[b9]{[10]}.  To obtain the maximum possible peak amplitude of the fundamental phase voltage in linear modulation, the procedure for this is given in \hyperref[b10]{[11]}\hyperref[b12]{[12]}\hyperref[b13]{[13]}  * a s a dc V T T V = (1) * b s b dc V T T V = (2) * c s c dc V T T V = (3) a T , b\par
T and c T are the imaginary switching time periods proportional to the instantaneous values of the reference phase voltages  This proposed SVPWM signal generation does not involve region identification, sector identification or look up tables for switching vector determination required in the conventional multilevel SVPWM technique. This scheme is computationally efficient when compared to conventional multilevel SVPWM scheme.0 min [ ] 2 offset T T T = ? (4) 0 [ ] s effect T T T = ?\textbf{(5)} 
\section[{III. Simulation Results and Comparison}]{III. Simulation Results and Comparison}Sa1 Sa2 Sa3 Sa4 a Sb1 Sb2 Sb3 Sb4 b Sc1 Sc2 Sc3 Sc4 c Sa5 Sa6 Sa7 Sa8 a Sb5 Sb6 Sb7 Sb8 Sc5 Sc6 Sc7 Sc8 Sa10 Sa12 Sb9 Sb10 Sb11 Sb12 Sc9 Sc10 Sc11 Sc12 Sa14 Sa16 Sb13 Sb14 Sb15 Sb16 Sc13 Sc14 Sc15 Sc16 Sa18 Sa20 Sb17 Sb18 Sb19 Sb20 Sc17 Sc18 Sc19 Sc20\par
To Induction
\begin{quote}
Motor Sa9 Sa11 Sa13 Sa15 Sa17 Sa19\end{quote}
\par
Fig.  {\ref 6} : Cascaded 11 level Multilevel Inverter.\par
An eleven level cascaded multilevel inverter fed with Induction motor shown in Fig.  {\ref 6} and for RL load is simulated. The carrier frequency fc is 1 kHz. The modulating pulses are generated by the comparing the reference wave with the triangular waves. For m level cascaded multilevel inverter m-1 carrier waves required.\par
It is simulated for different carrier modulating techniques PDPWM, PODPWM, APODPWM and PSCPWM. Fig.  {\ref 7} shows the generation of PWM pulses for Eleven Level Cascaded Multilevel Inverter by using PDSVPWM. Fig.  {\ref 8} shows the generation of PWM pulses for Eleven Level Cascaded Multilevel Inverter by using PODSVPWM. Fig. \hyperref[fig_9]{9} shows the generation of PWM pulses for Eleven Level Cascaded Multilevel Inverter by using APODSVPWM and Fig. \hyperref[fig_10]{10} shows the generation of PWM pulses for Eleven Level Cascaded Multilevel Inverter by using PSCSVPWM. Here reference wave is generated by modified SVPWM technique.   Fig. \hyperref[fig_11]{11} shows the harmonic spectrum of line voltage for PSCSPWM. Fig. \hyperref[fig_12]{12} shows the harmonic spectrum of line voltage for PDSPWM. Fig. \hyperref[fig_13]{13} shows the harmonic spectrum of line voltage for PODSPWM and Fig. \hyperref[fig_14]{14} shows the harmonic spectrum of line voltage for APODSPWM. It is observed that PDSPWM technique produces fewer harmonic with respect to other techniques.    Fig. \hyperref[fig_15]{15} shows harmonic spectrum of line voltage for an eleven level Cascaded Multilevel Inverter by using PDSVPWM technique. Fig. \hyperref[fig_16]{16} shows harmonic spectrum of line voltage for an eleven level Cascaded Multilevel Inverter by using PODSVPWM technique. Fig. \hyperref[fig_0]{17} shows harmonic spectrum of line voltage for an eleven level Cascaded Multilevel Inverter by using APODSVPWM technique and Fig. \hyperref[fig_0]{18} shows harmonic spectrum of line voltage for an eleven level Cascaded Multilevel Inverter by using PSCSVPWM technique.\par
From Fig. \hyperref[fig_16]{16}, it is observed that the significant harmonics are located around the carrier frequency fc for the line voltage waveform in PODSVPWM.\par
From Fig. \hyperref[fig_0]{17}, it is observed that the most significant harmonics are centered as sidebands around the carrier frequency fc and therefore no harmonics occur at fc for APODSVPWM.\par
From Fig. \hyperref[fig_0]{18}, it is observed that the PSCPWM strategy leads to the cancellation of all carrier and associated sideband harmonics up to 2Nth carrier group.\par
For APOD and POD , no harmonic exists at pulse number P due to odd symmetry of their PWM wave forms. For PD, the wave forms is asymmetric and the harmonic at P is relatively high only for single phase, but for three phase the triplen harmonics of voltage will be eliminated, thus harmonics at P is eliminated if P is chosen as a multiple of three. So PD is more convenient due to very little values of other harmonics.\par
It is observed that the total harmonic distortion is less in PDSVPWM technique with comparison to other SVPWM techniques and all other SPWM techniques.     Table \hyperref[tab_0]{1} shows the Line voltage harmonic comparison of an eleven level cascaded multilevel inverter connected to RL and Induction motor loads for all the PWM techniques. It is observed from the table that PDSVPWM technique generates fewer harmonic with respect to all other methods.\par
In this simulation the induction motor used is      shows Induction Motor torque waveform for the Space Vector PWM technique PODSVPWM and Fig. \hyperref[fig_28]{27} shows Induction Motor torque waveform for the Space Vector PWM technique APODSVPWM. Here the load torque is varied from 0 to 10 at 1 sec. It is observed that the motor torque reaches to steady state quickly by using various modified SVPWM techniques.              involve region identification, sector identification or look up tables for switching vector determination required in conventional SVPWM technique. Simulation studies have been carried out on Cascaded multilevel inverter fed Induction motor and RL load for different PWM techniques. It is observed that Modified SVPWM technique has given better torque and speed performance of the motor, and it is also noticed that one of the modified SVPWM techniques is PDSVPWM technique which produces less harmonic distortion with respect to all other PWM techniques.\par
V. Acknowledgment\begin{figure}[htbp]
\noindent\textbf{1}\includegraphics[]{image-2.png}
\caption{\label{fig_0}Fig. 1 :}\end{figure}
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\noindent\textbf{3}\includegraphics[]{image-3.png}
\caption{\label{fig_1}Fig. 3 :}\end{figure}
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\caption{\label{fig_6}T}\end{figure}
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\noindent\textbf{5}\includegraphics[]{image-9.png}
\caption{\label{fig_7}Fig. 5 :}\end{figure}
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\noindent\textbf{78}\includegraphics[]{image-10.png}
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\noindent\textbf{9}\includegraphics[]{image-11.png}
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\noindent\textbf{1718}\includegraphics[]{image-19.png}
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\caption{\label{fig_19}1 . 5}\end{figure}
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\caption{\label{fig_33}Fig. 31 :}\end{figure}
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     \begin{figure}[htbp]
\noindent\textbf{1} \par 
\begin{longtable}{P{0.06430260047281323\textwidth}P{0.3134751773049645\textwidth}P{0.1326241134751773\textwidth}P{0.14267139479905436\textwidth}P{0.19692671394799055\textwidth}}
\multicolumn{3}{l}{S.No Type of PWM}\tabcellsep \% THD\tabcellsep Magnitude\\
\tabcellsep \tabcellsep \tabcellsep \tabcellsep of\\
\tabcellsep \tabcellsep \tabcellsep \tabcellsep Fundamental\\
\tabcellsep I.\tabcellsep \multicolumn{3}{l}{SPWM With RL Load}\\
1\tabcellsep \multicolumn{2}{l}{PDSPWM}\tabcellsep 6.79\tabcellsep 865.7\\
2\tabcellsep \multicolumn{2}{l}{APODSPWM}\tabcellsep 8.57\tabcellsep 864.7\\
3\tabcellsep \multicolumn{2}{l}{PODSPWM}\tabcellsep 9.36\tabcellsep 860.7\\
4\tabcellsep \multicolumn{2}{l}{PSCSPWM}\tabcellsep 10.81\tabcellsep 692.5\\
\tabcellsep II.\tabcellsep \multicolumn{3}{l}{Modified SVPWM with RL load}\\
1\tabcellsep \multicolumn{2}{l}{PDSVPWM}\tabcellsep 5.51\tabcellsep 999.4\\
2\tabcellsep \multicolumn{2}{l}{PSCSVPWM}\tabcellsep 7.31\tabcellsep 998.6\\
3\tabcellsep \multicolumn{2}{l}{APODSVPWM}\tabcellsep 8.51\tabcellsep 1005\\
4\tabcellsep \multicolumn{2}{l}{PODSVPWM}\tabcellsep 8.85\tabcellsep 996.4\\
\tabcellsep \tabcellsep \multicolumn{2}{l}{III. SPWM With IM load}\\
1\tabcellsep \multicolumn{2}{l}{PDSPWM}\tabcellsep 6.76\tabcellsep 865.2\\
2\tabcellsep \multicolumn{2}{l}{PSCSPWM}\tabcellsep 1083\tabcellsep 693\\
3\tabcellsep \multicolumn{2}{l}{APODSPWM}\tabcellsep 8.46\tabcellsep 868.6\\
4\tabcellsep \multicolumn{2}{l}{PODSPWM}\tabcellsep 9.99\tabcellsep 869.8\\
\tabcellsep \multicolumn{4}{l}{IV. Modified SVPWM with IM load}\\
1\tabcellsep \multicolumn{2}{l}{PDSVPWM}\tabcellsep 5.24\tabcellsep 1000\\
2\tabcellsep \multicolumn{2}{l}{PSCSVPWM}\tabcellsep 7.15\tabcellsep 999.9\\
3\tabcellsep \multicolumn{2}{l}{APODSVPWM}\tabcellsep 8.87\tabcellsep 995.8\\
4\tabcellsep \multicolumn{2}{l}{PODSVPWM}\tabcellsep 8.80\tabcellsep 996.7\end{longtable} \par
 
\caption{\label{tab_0}Table 1 :}\end{figure}
 			\footnote{© 20 15 Global Journals Inc. (US)} 			\footnote{© 2015 Global Journals Inc. (US)} 		 		\backmatter   			 \par
We thank the University Grants Commission (UGC), New Delhi, for providing support to carryout research on Multilevel Inverters under the Major research project. 
\subsection[{VI. Future Scope}]{VI. Future Scope}\par
This modified SVPWM technique does not involve region identification, sector identification or look up tables for switching vector determination as are required in the conventional multilevel SVPWM technique, and reduces the computation time compared to the conventional space vector PWM technique. The hardware implementation with this SVPWM technique will also be easily possible for higher levels. 			  			  				\begin{bibitemlist}{1}
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\end{document}
