@incollection{, DF735CB3B90167AE0AC3C339CF7EC1E5 , author={{Mandala RakeshRaj} and {Ms S.Sujana} and {VARDHAMAN COLLEGE OF ENGINEERING}}, journal={{Global Journal of Researches in Engineering}}, journal={{GJRE}}2249-45960975-586110.34257/gjre, address={Cambridge, United States}, publisher={Global Journals Organisation}1461924 } @book{b0, , title={{Fast method of floating point multiplication and accumulation}} , author={{ HYeh }} , year={February 1999} } @incollection{b1, , title={{Floating-Point Multiply-Add-Fused with Reduced Latency}} , author={{ TLang } and { JDBruguera }} , journal={{IEEE Trans}} } @incollection{b2, , title={{}} , journal={{Computers}} 53 8 , year={Aug. 2004} } @incollection{b3, , title={{An Enhanced Floating Point Coprocessor for Embedded Signal Processing and Graphics Applications}} , author={{ CHinds }} , booktitle={{Proc. 33rd Asilomar Conf. Signals, Systems, and Computers}} 33rd Asilomar Conf. Signals, Systems, and Computers , year={1999} } @incollection{b4, , title={{Architectural Design of a Fast Floating-Point Multiplication-Add Fused Unit Using Signed-Digit Addition}} , author={{ LChen } and { JCheng }} , booktitle={{Proc. Euromicro Symp. Digital Systems Design}} Euromicro Symp. Digital Systems Design , year={2001} 346 } @incollection{b5, , title={{A Comparison of Three Rounding Algorithms for IEEE Floating-Point Multiplication}} , author={{ GEven } and { PMSeidel }} , journal={{IEEE. Trans. Computers}} 49 7 , year={July 2000} } @book{b6, , title={{Floating Point Unit for Calculating A=XY+Z Having Simultaneous Multiply and Add}} , author={{ EMontoye }} , year={November 1990} , note={United States patent} } @incollection{b7, , title={{Second -Generation RISC Floating Point with Multiply-Add Fused}} , author={{ RMontoye } and { EHokenek } and { SRunyon }} , journal={{IEEE journal of solid-state circuits}} 25 5 , year={October 1990} } @incollection{b8, , title={{The SNAP Project: Design of Floating-Point Arithmetic Units}} , author={{ SFOberman } and { HAl-Twaijry } and { MJFlynn }} , booktitle={{Proc. IEEE 13th Symp. Computer Arithmetic}} IEEE 13th Symp. Computer Arithmetic , year={1997} } @incollection{b9, , title={{Rounding Algorithms for IEEE Multipliers}} , author={{ MRSantoro } and { GBewick } and { MAHorowitz }} , booktitle={{Proc. IEEE Ninth Symp. Computer Arithmetic}} IEEE Ninth Symp. Computer Arithmetic , year={1989} } @incollection{b10, , title={{How Many Logic Levels Does Floating-Point Addition Require?}} , author={{ PMSeidel } and { GEven }} , booktitle={{Proc. Int'l Conf. Computer Design (ICCD 98)}} Int'l Conf. Computer Design (ICCD 98) , year={1998} } @incollection{b11, , title={{Leading Zero Anticipation and Detection --A Comparison of Methods}} , author={{ MSchmookler } and { KNowka }} , booktitle={{Proceedings of the 15th IEEE Symposium on Computer Arithmetic}} the 15th IEEE Symposium on Computer ArithmeticVail, Colorado , year={June 2001} } @incollection{b12, , title={{Floating-Point Fused Multiply-Add with Reduced Latency}} , author={{ TLang } and { JBruguera }} , journal={{IEEE Transactions on Computers}} 53 8 , year={August 2004} } @incollection{b13, , title={{Rounding Algorithms for IEEE Multipliers}} , author={{ MSantoro } and { GBewick } and { MAHorowitz }} , booktitle={{Proceedings of the 9th IEEE Symposium on Computer Arithmetic}} the 9th IEEE Symposium on Computer ArithmeticSanta Monica, California, USA , year={September 1989} }