@incollection{,
	
					
					
					E3790A11A29AC93856F1CA37C565DCDE
				,
	author={{Dr.V.C.Madhavi} and {Dr. Ch.RaviKumar} and {G.RamaKrishnaPrasad} and {Prakasam Engineering College, Kandukur.}},
	journal={{Global Journal of Researches in Engineering}},
	journal={{GJRE}}2249-45960975-586110.34257/gjre,
	address={Cambridge, United States},
	publisher={Global Journals Organisation}1273538
}

@incollection{b0,
	
	
		,
	title={{Finding MD5 collisions-A toy for a notebook}}
		,
	author={{
			Klima
		}}
	
	
		,
	journal={{Cryptology ePrint Archive}}
		
			,
	year={2005/075, 2005}
		
	

}

@incollection{b1,
	
	
		,
	title={{Finding collisions in the full SHA-1}}
		,
	author={{
			XWang
		} and {
			YLYin
		} and {
			HYu
		}}
		
		
	
	
		,
	booktitle={{Lecture Notes in Computer Science}}
		
			3621
			
			,
	year={2005}
			,
	publisher={Springer}
		
	

}

@book{b2,
	
	
		,
	title={{FIPS 180-2, secure hash standard (SHS)}}
		
			,
	year={2002}
		
		
			National Institute of Standards and Technology (NIST), MD
		
	

}

@incollection{b3,
	
	
		,
	title={{The design of a high speed ASIC unit for the hash function SHA-256 (384, 512)}}
		,
	author={{
			LDadda
		} and {
			MMacchetti
		} and {
			JOwen
		}}
		
		
	
	
		,
	booktitle={{Proc. DATE}}
				DATE
		
			,
	year={2004}
			
		
	

}

@incollection{b4,
	
	
		,
	title={{Quasi-pipelined hash circuits}}
		,
	author={{
			MMacchetti
		} and {
			LDadda
		}}
		
	
	
		,
	booktitle={{Proc. IEEE Symp. Comput. Arithmetic}}
				IEEE Symp. Comput. Arithmetic
		
			,
	year={2005}
			
		
	

}

@incollection{b5,
	
	
		,
	title={{An ASIC design for a high speed implementation of the hash function SHA-256 (384, 512)}}
		,
	author={{
			LDadda
		} and {
			MMacchetti
		} and {
			JOwen
		} and {
			DGarrett
		} and {
			JLach
		} and {
			CAZukowski
		} and {
			Eds
		}}
		
		
		
		
		
		
	
	
		,
	booktitle={{Proc. ACM Great Lakes Symp. VLSI}}
				ACM Great Lakes Symp. VLSI
		
			,
	year={2004}
			
		
	

}

@incollection{b6,
	
	
		,
	title={{Comparative analysis of the hardware implementations of hash functions SHA-1 and SHA-512}}
		,
	author={{
			TGrembowski
		} and {
			RLien
		} and {
			KGaj
		} and {
			NNguyen
		} and {
			PBellows
		} and {
			JFlidr
		} and {
			TLehman
		} and {
			BSchott
		}}
		
		
		
		
		
		
		
	
	
		,
	booktitle={{Lecture Notes in Computer Science}}
		,
	editor={ISC,A.H. Chan and V. D. Gligor}
		
			2433
			
			,
	year={2002}
			,
	publisher={Springer}
		
	

}

@book{b7,
	
	
		,
	title={{Efficient singlechip implementation of SHA-384&SHA-512}}
		,
	author={{
			MMcloone
		} and {
			JVMccanny
		}}
		
		
	

}

@book{b8,
	
	
		,
	title={{Proc. IEEE Int. Conf. Field-Program.Technol}}
				IEEE Int. Conf. Field-Program.Technol
		
			,
	year={2002}
			
		
	

}

@incollection{b9,
	
	
		,
	title={{Implementation of the SHA-2 hash family standard using FPGAs}}
		,
	author={{
			NSklavos
		} and {
			OKoufopavlou
		}}
		
	
	
		,
	journal={{J. Supercomput}}
		
			31
			
			,
	year={2005}
		
	

}

@incollection{b10,
	
	
		,
	title={{A 1 Gbit/s partially unrolled architecture of hash functions SHA-1 and SHA-512}}
		,
	author={{
			RLien
		} and {
			TGrembowski
		} and {
			KGaj
		}}
		
		
	
	
		,
	booktitle={{Proc. CT-RSA}}
				CT-RSA
		
			,
	year={2004}
			
		
	

}

@incollection{b11,
	
	
		,
	title={{Networking data integrity: High speed architectures and hardware implementations}}
		,
	author={{
			NSklavos
		} and {
			EAlexopoulos
		} and {
			OGKoufopavlou
		}}
		
		
	
	
		,
	journal={{Int. Arab J. Inf. Technol}}
		
			1
			
			,
	year={2003}
		
	

}

@incollection{b12,
	
	
		,
	title={{Optimisation of the SHA-2 family of hash functions on FPGAs}}
		,
	author={{
			RPMcevoy
		} and {
			FMCrowe
		} and {
			CCMurphy
		} and {
			WPMarnane
		}}
		
		
		
	
	
		,
	booktitle={{Proc}}
				null
		
			,
	year={2006}
			
		
	

}

@incollection{b13,
	
	
		,
	title={{Rescheduling for optimized SHA-1 calculation}}
		,
	author={{
			RChaves
		} and {
			GKuzmanov
		} and {
			LASousa
		} and {
			SVassiliadis
		}}
		
		
		
	
	
		,
	booktitle={{Proc. SAMOS Workshop Comput. Syst. Arch. Model. Simulation}}
				SAMOS Workshop Comput. Syst. Arch. Model. Simulation
		
			,
	year={Jul. 2006}
			
		
	

}

@incollection{b14,
	
	
		,
	title={{The MOLEN polymorphic processor}}
		,
	author={{
			SVassiliadis
		} and {
			SWong
		} and {
			GNGaydadjiev
		} and {
			KBertels
		} and {
			GKuzmanov
		} and {
			EMPanainte
		}}
		
		
		
		
		
	
	
		,
	journal={{IEEE Trans}}
		
	

}

@incollection{b15,
	
	
		,
	title={{Announcing the standard for secure hash standard}}
		,
	author={{
			Comput
		}}
	
	
		,
	journal={{FIPS}}
		
			53
			11
			
			,
	year={Nov. 2004. 15. 1993}
		
		
			National Institute of Standards and Technology (NIST), MD
		
	

}

@incollection{b16,
	
	
		,
	title={{The MOLEN __-coded processor}}
		,
	author={{
			SVassiliadis
		} and {
			SWong
		} and {
			SDCotofana
		}}
		
		
	
	
		,
	booktitle={{Proc. 11th Int. Conf. Field-Program. Logic Appl. (FPL)}}
				11th Int. Conf. Field-Program. Logic Appl. (FPL)
		
			,
	year={Aug. 2001}
			2147
			
		
	

}

@incollection{b17,
	
	
		,
	title={{Reconfigurable memory based AES coprocessor}}
		,
	author={{
			RChaves
		} and {
			GKuzmanov
		} and {
			SVassiliadis
		} and {
			LASousa
		}}
		
		
		
	
	
		,
	booktitle={{Proc. 13th Reconfigurable Arch. Workshop (RAW)}}
				13th Reconfigurable Arch. Workshop (RAW)
		
			,
	year={Apr. 2006}
			
		
	

}

@incollection{b18,
	
	
		,
	title={{Optimizing SHA-1 hash function for high throughput with a partial unrolling study}}
		,
	author={{
			HEMichail
		} and {
			APKakarountas
		} and {
			GNSelimis
		} and {
			CEGoutis
		}}
		
		
		
	
	
		,
	booktitle={{Lecture Notes in Computer Science}}
		,
	editor={PATMOS, V. Paliouras, J. Vounckx, and D. Verkest}
		
			3728
			
			,
	year={2005}
			,
	publisher={Springer}
		
	

}

@incollection{b19,
	
	
		,
	title={{Improving SHA-2 hardware implementations}}
		,
	author={{
			RChaves
		} and {
			GKuzmanov
		} and {
			LASousa
		} and {
			SVassiliadis
		}}
		
		
		
	
	
		,
	booktitle={{Proc. Workshop Cryptograph. Hardw. Embedded Syst. (CHES)}}
				Workshop Cryptograph. Hardw. Embedded Syst. (CHES)
		
			,
	year={Oct. 2006}
			
		
	

}

@book{b20,
	
	
		,
	title={{New Techniques for Hardware Implementations of SHA}}
		
	

}